Front-End Implementation (Synthesis) Engineer

About the role

Apple is looking for a Front‑End Implementation (Synthesis) Engineer to join the GPU Front‑End team in London. You will help craft and optimise the silicon implementation of world‑class GPUs that power millions of Apple devices.

Key responsibilities

• Perform power, performance and area (PPA) optimisation of netlists in collaboration with RTL and physical design teams.
• Deliver netlist quality milestones for assigned GPU partitions and improve methodology flow.
• Analyse critical paths, guide RTL designers toward efficient solutions, and implement ECOs for functionality and timing.
• Utilise logic equivalence and static timing analysis tools to ensure design integrity from RTL to gate level.
• Work closely with IP teams across multiple sites to integrate and verify GPU blocks.

Required profile

• BSc in Electrical Engineering or related field.
• Proficiency in Verilog and/or SystemVerilog and experience with scripting languages.
• Hands‑on experience with physical synthesis and PPA optimisation techniques.
• Strong understanding of physical design, static timing analysis, and DFT insertion.

Required skills

• Verilog
• SystemVerilog
• Scripting languages (e.g., Python, Tcl)
• Physical synthesis
• PPA optimisation
• Physical design and static timing analysis
• Design‑for‑test (DFT) insertion
• UPF (multi‑power domain) and linting tools
• ECO implementation
• Logic equivalence tools

What we offer

• Competitive compensation and benefits package.
• Access to cutting‑edge GPU and silicon technology.
• Inclusive and diverse work environment.
• Opportunities for professional growth within Apple’s hardware ecosystem.