Staff Design Verification Engineer

About the role

Analog Devices, part of the Data Center and Energy team, is looking for a Staff Design Verification Engineer. You will contribute to the design verification of analog and mixed-signal products and work with internal technology groups and external vendors to establish and improve a best-practice development methodology. The role is based in Freer, with about 10% travel required.

Key responsibilities

• Contribute to pre-silicon verification of mixed-signal products, working with verification and design engineers
• Bridge verification and validation environments and support post-silicon validation
• Aim for 100% verification coverage combining DMS and AMS, top-level, IP-level and formal analysis
• Establish and continuously improve verification flows, methodologies and models for the team

Required profile

• Bachelor's or Master's degree in electronics engineering or equivalent, with 7+ years of experience
• Experience with full-chip design verification of mixed-signal devices
• Strong verbal and written communication skills and ability to collaborate with a global team

Required skills

• IC top-level DMS SV/UVM verification, object-oriented and randomized verification, and gate-level simulation
• Top-level metric-driven analog mixed-signal (AMS) simulations
• Analog block modelling and validation (RNM, Verilog-AMS)
• Cadence tool suite (Xcelium/IMC/Virtuoso)
• Verification planning tools (ePlanner/vManager) and scripting (Shell, TCL, Perl, Python)
• FPGA prototyping and pre-silicon validation scripting
• Experience with multiple clock and power domains