Principal FPGA Engineer

About the role

Tekever, a European leader in unmanned technology covering digital, defence, security and space, is looking for a Principal FPGA Engineer in its Bristol R&D team. The role takes technical ownership of FPGA and programmable logic design inside gimbal payloads, covering the video capture and processing chain, sensor and high-speed serial interfaces, real-time pointing and stabilisation control and the interface to mission computing. It involves taking in-house payload electronics from prototype to production instead of bought-in units.

Key responsibilities

• Own FPGA and SoC design for payload video and control: RTL design, simulation, synthesis, timing closure and hardware bring-up.
• Develop the video pipeline, from sensor capture and correction through stabilisation and overlay to video and metadata output.
• Implement real-time interfaces for pointing and stabilisation, working with control, mechanical and software engineers.
• Take in-house image processing and position control boards through to qualified production, reducing reliance on bought-in units.
• Define verification: testbenches, coverage, hardware-in-the-loop rigs and investigation of test findings.
• Review schematics in Altium for pin assignment, clocking and constraints, set coding and configuration control standards, and mentor other engineers.

Required profile

• Degree in electronic engineering or a related discipline, with around 10 years or more of FPGA development.
• Delivered video or imaging pipelines in hardware, including common camera and serial sensor interfaces.
• Experience of designs where programmable logic and an embedded processor share the work, including register maps, drivers and boot.
• Airborne or defence hardware experience is an advantage.
• Eligible for and willing to undergo UK SC level security clearance vetting.
• Willingness to travel occasionally to Tekever sites (UK, Portugal, US, Europe) and possibly to deployed operations, and to travel within the UK and Portugal.

Required skills

• Strong VHDL or SystemVerilog, with fluency in main FPGA vendor toolchains.
• Debugging on real hardware with oscilloscopes, logic analysers and protocol tools, and reading schematics in Altium.

What we offer

• Competitive salary with a discretionary annual bonus and a pension contribution match of up to 10%.
• 25 days annual leave plus Bank Holidays, private medical insurance, private dental care and an Employee Assistance Programme.
• Career development opportunities and a flexible hybrid model, typically three days a week at the core UK sites.
• A rewards platform with high street discounts and salary sacrifice schemes (Electric Car, Cycle to Work, Technology).